1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device that includes redundant circuitry including fuses.
2. Background Art
In recent years, semiconductor devices have been miniaturized and increased in capacity and speed, resulting in an increase in the number of devices, or elements, formed therein. This has increased the influence of the defective device portions on the manufacturing yield of the semiconductor devices. Therefore, to prevent a reduction in the yield of semiconductor devices due to their defective device portions, many semiconductor devices have a redundant circuit configuration in which a plurality of spare (or redundant) memory cells are provided separately from the memory cells in the normal memory regions. With this arrangement, if a memory cell is found to include a defective element, this cell is replaced by a spare memory cell to salvage the semiconductor device and thereby ensure high manufacturing yield of the device.
One widely used method for replacing a memory cell including a defective element by a spare memory cell is laser trimming. In laser trimming, a wiring layer(s) functioning as fuses is cut off, or blown, by a laser beam according to a predetermined code to replace a defective memory cell by a spare memory cell. To prevent fuse blow defects in a laser trimming process, a method for blowing a fuse is proposed which applies a plurality of different wavelength laser beams to fuse wiring having a multilayer structure (see, e.g., Japanese Laid-Open Patent Publication No. 2002-134616).
However, when a fuse is blown by laser trimming using a laser beam, the applied beam may affect layers under the fuse or regions around it. Therefore, if these layers and regions include wiring such as signal wiring and power supply wiring and devices such as transistors, these wirings or these devices may be damaged when the fuse is blown. To avoid this, a semiconductor device may be configured such that the regions right under fuses and regions therearound have no devices other than fuses formed therein. However, this prevents the miniaturization of the semiconductor device.
In a semiconductor device having a multilayer structure, a number of thin interlayer films are stacked upon one another. This means that a plurality of insulating films are formed in layers over the fuses. Naturally, this insulating film stack on the fuses includes all variations in the etching and in the forming processes of each insulating film. Therefore, it is difficult to limit the variation in the thickness of the film stack across the wafer surface or between lots to 200 nm or less.
On the other hand, when a fuse having a small film thickness is blown, the upward force of the blow is small. In such a case, the opening formed by the fuse blow is large, which may have an adverse affect upon adjacent fuses or devices. Therefore, to reduce the size of the opening formed by the fuse blow, the fuse must have a sufficient film thickness. As a result, the range of allowable thicknesses of the insulating film stack on the fuse is limited. For example, when the thickness of the fuse is 250 nm, the insulating film stack on the fuse must have a thickness of approximately 200 nm or less.
However, it is difficult to reduce the variation in the thickness of the insulating film stack on the fuses to 200 nm or less, as described above. Therefore, if the thickness of the insulating film stack is set to 200 nm or less, the surface of the fuses may be exposed where the thickness variation is at its maximum (that is, 200 nm), which is not desirable since such a situation can lead to an unreliable fuse blow.